PAD-DFN SERIES
MINIATURE/NON MAGNETIC
8-PIN DFN PACKAGE
LOW LEAKAGE DIODE
FEATURES
REVERSE BREAKDOWN VOLTAGE
BVR ≥ -30V
REVERSE CAPACITANCE
Crss ≤ 2.0pF
DFN SERIES
TOP VIEW
C
C
8
7
6
5
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
-55 to +150 °C
Operating Junction Temperature
-55 to +150 °C
PADF
YYWW
Maximum Power Dissipation2
Continuous Power Dissipation
300mW
Maximum Currents
Forward Current
10mA
1
2
3
A
4
LEADS 1, 2, 4, 5 & 7 – NO CONNECTION
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
BVR
CHARACTERISTIC
MIN
Reverse Breakdown Voltage
-30
TYP
VF
Forward Voltage
0.8
Crss
Total Reverse Capacitance
1.5
MAX UNITS
1.5
V
pF
CONDITIONS
IR = -1µA
IF = 5mA
VR = -5V, f = 1MHz
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
IR
CHARACTERISTIC
TYP
Maximum Reverse Leakage Current
Linear Integrated Systems
•
PAD5DFN
-5
PAD50DFN
-50
UNITS
pA
CONDITIONS
VR = -20V
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201182 07/25/2019 Rev#A10 ECN# PADDFN SERIES
Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by DFNs D1 and D2. Common
Mode Input voltage limited by DFNs D3 and D4 to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. DFN diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 2
FIGURE 1
+V
PAD5DFN
JPAD5
D1
JPAD20
PAD5DFN
D1
D2
+V
-V
D2
OP-27
2N4117A
4117DFN
+
D3
D4
ein
2N4393
4391DFN
CONTROL
SIGNAL
C
+15V -15V
VOUT
R
DFN PACKAGE
TOP VIEW
BOTTOM VIEW
SOLDER PAD PITCH & DIMENSIONS
EXPOSED PAD
1.80±0.05
(2 SIDES)
1.60±0.15
5
PACKAGE OUTLINE
8
0.20 MIN
2.0±0.10
(4 SIDES)
CHAMFERED CORNER
FOR PIN 1 INDICATOR
0.25X0.25
0.90±0.15
0.20 MIN.
SIDE VIEW
4
0.76±0.05
0.29±0.10
(8x)
0.50
(6x)
TYP.
1
0.25±0.05
(8x)
2.50±0.05
1.05±0.10
(2 SIDES)
0.20 MIN
0.42±0.05
(8X)
0.675±0.05
0.50
(4x)
TYP.
ALL DIMENSIONS IN MILLIMETERS
0.30
(4x)
TYP.
0.25±0.05
(8X)
NOTES
1.
2.
3.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
Derate 2.8 mW/ºC above 25ºC
The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown
are available upon request.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems develops and produces the highest performance semiconductors of their kind in the industry. Linear
Systems, founded in 1987, uses patented and proprietary processes and designs to create its high performance discrete
semiconductors. Expertise brought to the company is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company founder John H. Hall.
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201182 07/25/2019 Rev#A10 ECN# PADDFN SERIES
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